Integrated circuits find application in many of today's consumer electronics, such as cell phones, video cameras, portable music players, printers, computers, calculators, automobiles, etc. Integrated circuits may include a combination of active devices, passive devices and their interconnections.
In some instances, integrated circuits may take the form of nonvolatile memory, which can be an integrated circuit device designed to store digital data in the form of an electrical charge. Uniquely, a nonvolatile memory charge remains in storage even after the power is turned off. Accordingly, the use of nonvolatile memory devices can be particularly advantageous for power saving applications or in applications where power can be interrupted.
Nonvolatile flash memory usually takes one of two forms, a stack gate form or a split-gate form. The split-gate form, which is of particular interest herein, is well known in industry today and has a structure equivalent to two transistors in series. One of the two transistors is an enhancement gate transistor and the other is a stacked gate transistor. These two transistors are geometrically joined with the gate of the enhancement transistor being the control gate of the stacked gate transistor. The stacked gate transistor performs like a conventional simple stacked gate cell, where its floating gate is formed by a first layer of polysilicon under a control gate made from a second layer of polysilicon. The number of electrons stored on the floating gate changes the threshold of the stacked gate transistor which determines the value of the stored data on the floating gate. The enhancement gate of the split gate cell performs as a selector for the stacked gate transistor, and has a positive threshold voltage. This allows the enhancement gate to act as a selector for accessed cells and an isolator for deselected cells without consideration of the threshold voltage of the stacked gate transistor.
In conventional fabrication processes, nonvolatile flash memory cells are formed in a memory area of a semiconductor substrate while logic devices are formed elsewhere in a logic area on the semiconductor substrate. In order to optimize processing, certain material layers are formed and utilized on both the memory area and logic area. For example, dielectric material is typically deposited over both memory and logic areas and processed to form select gate dielectric layers in the memory area and to form input/output device gate dielectric, core device gate dielectric, and/or high voltage device gate dielectric layers in the logic area. However, the dual use of such gate dielectric is limiting to the memory cell processing.
Accordingly, it is desirable to provide improved methods for fabricating integrated circuits having memory cells. Also, it is desirable to provide methods for fabricating memory cells that are independent of or less dependent on logic device processing. In addition, it is desirable to provide integrated circuits that include memory cells having improved select gate dielectric layers. Furthermore, other desirable features and characteristics will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.